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Chip Design for Submicron VLSI: CMOS Layout and Simulation

By: Uyemura J PSeries: - Cengage Learning 2009Edition: -Description: 411+xviiiISBN: 9788131501955Subject(s): Electronics and Communication | VLSI
Item type Current location Collection Shelving location Call number Status Date due Barcode Item holds
Books Books Central Library, KARE, Krishnankoil Campus
Electrical and Electronics Engineering General Stack 621.38.049.77 P6 Available 99726
Books Books Central Library, KARE, Krishnankoil Campus
Electrical and Electronics Engineering General Stack 621.38.049.77 P6 Available 99727
Books Books Central Library, KARE, Krishnankoil Campus
Electrical and Electronics Engineering General Stack 621.38.049.77 P6 Available 99728
Books Books Central Library, KARE, Krishnankoil Campus
Electronics and Communication Engineering Transferred to Instrumentation and Control Engineering Dept. Library - Available 44314
Total holds: 0

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